Sept. 28 - Oct 2, Washington DC

Important Dates

Submission: 31 May, 2019 (+7 days)* 

Notification: 31 July, 2019 

Camera-Ready: 15 August, 2019

* Automatic 1-week submission extension 

Submission Formats

1–2 page Abstracts 

5–6 page Position Papers 

10+ page Research Papers

Conference paper formatACM 'sigconf'

proceedings templateblind submission

(no authors listed), up to 16 pages long 


Shekhar Borkar, Qualcomm 

Steve Pawlowski, Micron


James Ang, PNNL 

Jonathan Beard, Arm 

Michael Heroux, Sandia National Labs

Shang Li, Cadence

Hemant Rotithor, Arm 

Gwendolyn Voskuilen, Sandia National Labs

Kenneth Wright, Rambus 

Thuc Hoang, NNSA


Bruce Jacob, University of Maryland 

Kathy Smiley, Memory Systems

Program Committee

Ameen Akel, Micron 

Abdel-Hameed Badawy, NMSU 

Ishwar Bhati, Intel 

Bruce Childers, University of Pittsburgh 

Zeshan Chishti, Intel 

Bruce Christenson, Intel 

Sung Woo Chung, Korea University

Stephan Diestelhorst, Arm 

Chen Ding, University of Rochester 

David Donofrio, Berkeley Lab 

Wendy Elsasser, Arm 

Dietmar Fey, FAU Erlangen-Nürnberg 

Paul Gratz, Texas A&M 

Xiaochen Guo, Lehigh University 

Manish Gupta, NVIDIA 

Michael Healy, IBM 

Jian Huang, UIUC 

Matthias Jung, Fraunhofer IESE 

John Leidel, TactCompLabs 

Edgar Leon, LLNL 

Trevor Mudge, University of Michigan 

J. Thomas Pawlowski, Micron 

Petar Radojkovic, BSC 

Arun Rodrigues, Sandia National Labs 

Kevin Rudd, DoD 

Charles Sobey, Channel Science 

Robert Voigt, Northrop Grumman 

Gwendolyn Voskuilen, Sandia National Labs 

Owens Walker, US Naval Academy 

Norbert Wehn, U. Kaiserslautern 

Noel Wheeler, DoD 

Ke Zhang, Chinese Academy of Sciences


This Year Marks our 5th Year!


Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Visit for more information.

Areas of Interest

Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers focusing on system, software, and architecture level concepts, outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following:

  • Memory-system design from both hardware and software perspectives
  •  Memory failure modes and mitigation strategies
  •  Memory and system security issues
  •  Memory for embedded and autonomous systems (e.g., automotive)
  •  Operating system design for hybrid/nonvolatile memories
  •  Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
  •  Memory-centric programming models, languages, optimization
  •  Compute-in-memory and compute-near-memory technologies
  •  Data-movement issues and mitigation techniques
  •  Interconnects to support large-scale data movement
  •  Algorithmic & software memory-management techniques
  •  Emerging memory technologies, their controllers, and novel uses
  •  Interference at the memory level across datacenter applications
  •  Issues in the design and operation of large-memory machines
  •  In-memory databases and NoSQL stores
  •  Post-CMOS scaling efforts and memory technologies to support them, including cryogenic, neural, and heterogeneous memories

To reiterate, papers that focus on topics outside of traditional conference scopes will be preferred over others.

Submissions and Presentations

Our primary goal is to showcase interesting ideas that will spark conversation between disparate groups—to get applications people, operating systems people, system architecture people, interconnect people and circuits people to talk to each other. We accept extended abstracts, position papers, and/or full research papers, and each accepted submission is given a 20-minute presentation time slot. All accepted papers will be published in the ACM Digital Library and IEEE Xplore.

Submit your paper via EasyChair paper here.