MEMSYS US 2017

Important Dates

Submission: 1 May*, 2017
Notification: 16 June, 2017
Camera-Ready: 1 August, 2017
* There will be an automatic
submission extension of one week


Submission Formats

1–2 page Abstracts
5–6 page Position Papers
10+ page Research Papers
Conference paper layout, using
ACM’s proceedings template
(sigconf), blind submission (no
authors listed), up to 16 pages long

Organizers

Bruce Jacob, U. Maryland
Kathy Smiley, Memory Systems
Rajat Agarwal, Intel
Ameen Akel, Micron
James Ang, Sandia National Labs
Bruce Childers, U. Pittsburgh
Zeshan Chishti, Intel
Bruce Christenson, Intel
Chen Ding, U. Rochester
David Donofrio, Berkeley Lab
Wendy Elsasser, ARM
Maya Gokhale, LLNL
Xiaochen Guo, Lehigh U.
Michael Ignatowski, AMD
Matthias Jung, U. Kaiserslautern
Hyesoon Kim, Georgia Tech
Scott Lloyd, LLNL
Sally A. McKee, Chalmers/Rambus
Moinuddin Qureshi, Georgia Tech
David Resnick, Sandia National Labs
Arun Rodrigues, Sandia National Labs
Robert Voigt, Northrop Grumman
Vincent Weaver, U. Maine
Christian Weis, U. Kaiserslautern
Kenneth Wright, Rambus
Sudhakar Yalamanchili, Georgia Tech
Ke Zhang, Chinese Acad. of Sciences
Jishen Zhao, UC Santa Cruz

Call for Papers

Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Visit memsys.io for more information.

Areas of Interest

Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers that focus on system, software, and architecture level concepts, outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following:
• Memory-system design from both hardware and software perspectives
• Memory failure modes and mitigation strategies
• Memory and system security issues
• Operating system design for hybrid/nonvolatile memories
• Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
• Memory-centric programming models, languages, optimization
• Compute-in-memory and compute-near-memory technologies
• Data-movement issues and mitigation techniques
• Interconnects to support large-scale data movement
• Algorithmic & software memory-management techniques
• Emerging memory technologies, their controllers, and novel uses
• Interference at the memory level across datacenter applications
• Issues in the design and operation of large-memory machines
• In-memory databases and NoSQL stores
• Post-CMOS scaling efforts and memory technologies to support them,
including cryogenic, neural, and heterogeneous memories
To reiterate, papers that focus on topics outside of traditional conference scopes will be preferred over others.

Submissions and Presentations

Our primary goal is to showcase interesting ideas that will spark conversation between disparate groups—to get applications people, operating systems people, system architecture people, interconnect people and circuits people to talk to each other. We accept extended abstracts, position papers, and/or full research papers, and each accepted submission is given a 20-minute presentation time slot. All accepted papers will be published in the ACM Digital Library.